NIRISS has a dual Pupil and Filter Wheel assembly. Collimated light first passes through a selected position in the Pupil Wheel and then through the selected position in the Filter Wheel. Figure 1 shows the elements of the Pupil and Filter Wheels and Figure 2 shows the filter response curves. The Pupil Alignment Reference (PAR) shown in Figure 1 is used during ground testing to verify the positioning of NIRISS in the Integrated Science Instrument Module (ISIM). Its presence decreases the throughput of the "CLEARP" element by about 10%.
|Pupil Wheel||Supported Modes|
|F115W||WFSS, Imaging (blue)|
|F150W||WFSS, Imaging (blue)|
|F200W||WFSS, Imaging (blue)|
|Filter Wheel||Supported Modes|
|CLEAR||SOSS, Imaging (blue)|
*GR150C and GR150R are a matched pair of orthogonal grisms with R=150. That is, the grisms disperse their spectra perpendicular to each other.
*GR700XD is a grism with R=700 at the blaze maximum, spectra from three cross-dispersed (XD) orders are produced.
- The NIRISS detector consists of a single sensor chip assembly (SCA) with the following characteristics.
- 2048 x 2048 pixel HgCdTe array. Each pixel is 18 microns on a side.
- Dark rate: < 0.02 e-/s
- Noise: 23 e- (correlated double sample)
- Gain: 1.5 e-/ADU
- 2.2' x 2.2' field of view (FOV)
- Plate scale in x: 0.0654 arcsec/pixel; plate scale in y: 0.0658 arcsec/pixel
- The 2048 x 2048 pixels of the SCA are divided into 2040 x 2040 photosensitive pixels and a 4-pixel wide border of non-photosensitive reference pixels around the outside perimeter. The reference pixels do not respond to light, but are sampled and digitized in exactly the same way as the light sensitive pixels. The reference pixels can be used to monitor and remove various low-frequency bias drifts.
- The composition of the detector is tuned to provide a long-wavelength cutoff at approximately 5.3 microns.
- The SCA is fabricated and packaged into a focal-plane assembly (FPA) that includes a HAWAII-2RG readout integrated circuit (ROIC), which is controlled by a SIDECAR Application Specific Integrated Circuit (ASIC). The ASIC is a custom-built chip that clocks the array, sets the bias voltages, and performs the analog-to-digital conversion of the pixel voltages.
- A full-frame read of the SCA is digitized through four readout amplifiers. Each amplifier reads a strip that is 512 x 2048 pixels.