

There are two different interface circuits in the SDS (SDS-1 and SDS-2), with unit 1 dedicated to the camera of the F/48 relay and unit 2 to the camera of the F/96 relay. The SDS memory is physically divided into 22 modules of 16K 16-bit data words each holding 32 words from each of 512 lines, but only 16 modules are active at any given time. These 16 modules are accessed in sequence to reduce the required memory cycle time. Each SDS word has 22 bits, with the extra 6 bits being used for "single-bit" error correction and "two-bit" error detection. Included in the engineering telemetry are error detection and correction bits set for each logical module. If more than 6 SDS memory modules fail, the memory can still be operated in a reduced data mode. In this case, zeros will appear in the downlink for those modules that are not available. Data loss occurs from the ``right-hand'' side, so if only 15 modules are up, words 0-479 for each of the PDA lines of 512 pixels would be obtained.
The SDS can be operated in either the normal imaging mode or the SDS dump mode so it is necessary to interrupt the pixel increment commands from the detector to read out the SDS memory to the downlink. Each readout is a dump of the 256K 16-bit words of SDS memory, and hence contains 4M data bits regardless of the image format. Readout of science data is normally done under control of the NSSC-1, which controls the gating of signals to the Remote Interface Unit (RIU) of the SI C&DH including the Science Data Formatter (SDF). From the SDF, the data is fed to the downlink or the tape recorder.

Generated with CERN WebMaker